Ардуино. ESP8266.

Измерение и контроль параметров: температура, влажность, освещённость, давление, наличие напряжения, датчик движения, тревожная кнопка (дача, квартира, дом, цех, теплица, офис). Выдача измеренных параметров на персональную страницу в Интернете, на планшет, в смартфон. В случае выхода параметров за заданные границы - оповещение по электронной почте, sms.

STM32F103C8T6 Blue pill цоколёвка

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STM32F103x8, STM32F103xB

Pinouts and pin description

Table 5. Medium-density STM32F103xx pin definitions

Pins

Pin name

Type
(*1)

I/O Level
(*2)

Main
function(3) (after reset)

Alternate functions(4)

LFBGA100

UFBG100

LQFP48/UFQFPN48

TFBGA64

LQFP64

LQFP100

VFQFPN36

Default

Remap

PE2

I/O

PE2

TRACECK

PE3

I/O

PE3

TRACED0

PE4

I/O

PE4

TRACED1

PE5

I/O

PE5

TRACED2

PE6

I/O

PE6

TRACED3

VBAT

Pins

Pin name

Type
(*1)

I/O Level
(*2)

Main
function(3) (after reset)

Alternate functions(4)

LFBGA100

UFBG100

LQFP48/UFQFPN48

TFBGA64

LQFP64

LQFP100

VFQFPN36

Default

Remap

PC13-TAMPER-
rtc(5)

I/O

PC13(6)

TAMPER-RTC

PC14-OSC32_IN(5)

I/O

PC14(6)

OSC32_IN

PC15-
OSC32_OUT(5)

I/O

PC15(6)

OSC32_OUT

VSS_5

VDD_5

OSC_IN

PD0(7)

OSC_OUT

PD1(7)

NRST

I/O

NRST

PC0

I/O

PC0

ADC12_IN10

PC1

I/O

PC1

ADC12_IN11

PC2

I/O

PC2

ADC12_IN12

-(8)

PC3

I/O

PC3

ADC12_IN13

VSSA

VREF-

G1(8)

VREF+

VDDA

PA0-WKUP

I/O

PA0

WKUP/
USART2 CTS(9)/ ADC12 IN0/ TIM2 CH1
ETR(9)

PA1

I/O

PA1

USART2_RTS(9)/ ADC12 IN1/ TIM2_CH2(9)

PA2

I/O

PA2

USART2_TX(9)/ ADC12 IN2/ TIM2_CH3(9)

PA3

I/O

PA3

USART2 RX(9)/ ADC12_IN3/ TIM2_CH4(9)

VSS_4

VDD_4

PA4

I/O

PA4

SPI1 nss(9)/ USART2 CK(9)/ ADC12_IN4

PA5

I/O

PA5

SPI1 SCK(9)/ ADC12_IN5

PA6

I/O

PA6

SPI1 MISO(9)/ ADC12_IN6/ TIM3_CH1(9)

TIM1_BKIN

PA7

I/O

PA7

SPI1 MOSI(9)/ ADC12_IN7/ TIM3_CH2(9)

TIM1_CH1N

PC4

I/O

PC4

ADC12_IN14

PC5

I/O

PC5

ADC12_IN15

PB0

I/O

PB0

ADC12_IN8/
TIM3_CH3(9)

TIM1_CH2N

PB1

I/O

PB1

ADC12_IN9/
TIM3_CH4(9)

TIM1_CH3N

PB2

I/O

PB2/BOOT1

PE7

I/O

PE7

TIM1_ETR

PE8

I/O

PE8

TIM1_CH1N

PE9

I/O

PE9

TIM1_CH1

PE10

I/O

PE10

TIM1_CH2N

PE11

I/O

PE11

TIM1_CH2

PE12

I/O

PE12

TIM1_CH3N

M10

PE13

I/O

PE13

TIM1_CH3

M11

PE14

I/O

PE14

TIM1_CH4

M12

PE15

I/O

PE15

TIM1_BKIN

L10

PB10

I/O

PB10

I2C2_SCL/
USART3_TX(9)

TIM2_CH3

L11

PB11

I/O

PB11

I2C2_SDA/
USART3_RX(9)

TIM2_CH4

F12

VSS_1

G12

VDD_1

L12

PB12

I/O

PB12

SPI2 NSS/ I2C2_SMBAl/ USART3 CK(9)/ TIM1_BKIN(9)

K12

PB13

I/O

PB13

SPI2 SCK/ USART3_CTS(9)/ TIM1_CH1N (9)

K11

PB14

I/O

PB14

SPI2 MISO/ USART3_RTS(9) TIM1_CH2N (9)

K10

PB15

I/O

PB15

SPI2 MOSI/ TIM1_CH3N(9)

PD8

I/O

PD8

USART3_TX

PD9

I/O

PD9

USART3_RX

J12

PD10

I/O

PD10

USART3_CK

J11

PD11

I/O

PD11

USART3_CTS

K10

J10

PD12

I/O

PD12

TIM4 CH1 / USART3_RTS

J10

H12

PD13

I/O

PD13

TIM4_CH2

H10

H11

PD14

I/O

PD14

TIM4_CH3

G10

H10

PD15

I/O

PD15

TIM4_CH4

F10

E12

PC6

I/O

PC6

TIM3_CH1

E10

E11

PC7

I/O

PC7

TIM3_CH2

E10

PC8

I/O

PC8

TIM3_CH3

D12

PC9

I/O

PC9

TIM3_CH4

D11

PA8

I/O

PA8

USART1 CK/ TIM1 CH1(9)/ MCO

D10

PA9

I/O

PA9

USART1 TX(9)/ TIM1_CH2(9)

D10

C12

PA10

I/O

PA10

USART1 RX(9)/ TIM1_CH3(9)

C10

B12

PA11

I/O

PA11

USART1_CTS/
canrx(9)/
USBDM/
TIM1_CH4(9)

B10

A12

PA12

I/O

PA12

USART1 RTS/
CANTX(9)
/USBDP
TIM1_ETR(9)

A10

A11

PA13

I/O

JTMS/SWDIO

PA13

C11

Not connected

F11

VSS_2

G11

VDD_2

A10

PA14

I/O

JTCK/SWCLK

PA14

PA15

I/O

JTDI

TIM2 CH1 ETR/PA15 /SPI1_NSS

B11

PC10

I/O

PC10

USART3_TX

C10

PC11

I/O

PC11

USART3_RX

B10

PC12

I/O

PC12

USART3_CK

PD0

I/O

PD0

CANRX

PD1

I/O

PD1

CANTX

PD2

I/O

PD2

TIM3_ETR

PD3

I/O

PD3

USART2_CTS

PD4

I/O

PD4

USART2_RTS

PD5

I/O

PD5

USART2_TX

PD6

I/O

PD6

USART2_RX

PD7

I/O

PD7

USART2_CK

PB3

I/O

JTDO

TIM2 CH2 / PB3
TRACESWO
SPI1_SCK

PB4

I/O

JNTRST

TIM3 CH1/ PB4/
SPI1_MISO

PB5

I/O

PB5

I2C1_SMBAl

TIM3_CH2 / SPI1_MOSI

PB6

I/O

PB6

I2C1 SCL(9)/ TIM4_CH1(9)

USART1_TX

PB7

I/O

PB7

I2C1 SDA(9)/ TIM4_CH2(9)

USART1_RX

BOOT0

PB8

I/O

PB8

TIM4_CH37 8 (9)

I2C1 SCL / CANRX

PB9

I/O

PB9

TIM4_CH4(9)

I2C1 SDA/ CANTX

PE0

I/O

PE0

TIM4_ETR

PE1

I/O

PE1

VSS_3

100

VDD_3

I = input, O = output, S = supply.

FT = 5 V tolerant.

Function availability depends upon the chosen device. For devices having reduced peripheral counts, it is always the lower number of peripheral that is included. For example, if a device has only one SPI and two USARTs, they are called SPI1 and USART1 and USART2, respectively. Refer to Table 2.

If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).

PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: the speed should not exceed 2 MHz with a maximum load of 30 pF and these IOs must not be used as a current source (e.g. to drive a LED).

Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the STMicroelectronics website: www.st.com.

The pins number 2 and 3 in the VFQFPN36 package, 5 and 6 in the LQFP48, UFQFP48 and LQFP64 packages, and C1 and C2 in the TFBGA64 package are configured as OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be remapped by software on these pins. For the LQFP100 package, PD0 and PD1 are available by default, so there is no need for remapping. For more details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual.
The use of PD0 and PD1 in output mode is limited as they can only be used at 50 MHz in output mode.

Unlike in the LQFP64 package, there is no PC3 in the TFBGA64 package. The VREF+ functionality is provided instead.

This alternate function can be remapped by software to some other port pins (if available on the used package). For more details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available from the STMicroelectronics website: www.st.com.

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